Combinatorial Optimization in Mapping Generalized Template Matching onto Reconfigurable Computers
نویسندگان
چکیده
A brief review of mapping generalized template matching operations onto reconfigurable computers is given. A combinatorial optimization process, where the objective is to minimize the FPGA computation time and the constraint is the FPGA board resources, is a key step of the whole mapping process. This paper presents algorithms for solving the optimization problem and experimental results.
منابع مشابه
Mapping of generalized template matching onto reconfigurable computers
—Image processing algorithms for template matching, 2D digital filtering, morphologic operations, and motion estimation share some common properties. They can all benefit from using reconfigurable computers that use co-processor boards based on FPGA (field programmable gate array) chips. This paper characterizes those applications as generalized template matching (GTM) operations and describes ...
متن کاملInterface Design for the Mapping of Generalized Template Matching on Reconfigurable Systems
Algorithms considered as generalized template matching (GTM) operations [1] can be accelerated by using recon gurable systems with eld programmable gate array (FPGA) hardware resources. This paper proposes a method of designing the interface among FPGA, host processor, and on-board memory for GTM operations. The goal is to support the automation of the interface design and to improve the portab...
متن کاملLoop Kernel Pipelining Mapping onto Coarse-Grained Reconfigurable Architecture for Data-Intensive Applications
Coarse-grained reconfigurable architectures (CGRA) provide flexible and efficient solution for data-intensive applications. Loop kernels of these applications always consume much execution time of the whole program. However, mapping loop kernels onto CGRA is still hard to meet performance/cost constraints. This paper proposes a novel approach for automatically mapping loop kernels onto CGRA wit...
متن کاملApplication Specific Computers for Combinatorial Optimisation
Solving large combinatorial optimisation problems is often time consuming, and thus there is interest in accelerating current algorithms by building application specific computers. This paper focuses on accelerating general local search meta-heuristics, such as simulated annealing and tabu search, and presents an architecture for this class of algorithms. As a design case study we describe a sp...
متن کاملMapping Floating-Point Kernels onto High Performance Reconfigurable Computers
Contemporary field programmable gate arrays (FPGAs) combine the fine-grained design capability of the traditional lookup table with the speed of medium-scale and large-scale logic components such as RAM blocks or DSP blocks to provide for significant computational capability from a single FPGA. High performance reconfigurable computers, which typically use FPGAs as computational elements, have ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2006